Overview

The 83PN161i is LVPECL output synthesizer designed for converting forward-error correction (FEC) clock frequencies in 10 GB Ethernet LAN/WAN transport applications. The device is optimized for an input frequency of 156.25MHz and supports four FEC rate conversions: 33/32, 255/237, 255/238 and 235/236. The conversion rate is pin-selectable and one of four rates are supported at a time. In the default configuration, an input clock of 156.25MHz is converted to an output clock of 168.8294492MHz (255/236). The device uses IDT's fourth Generation of FemtoClock® NG technology to deliver low phase noise clocks combined with a low power consumption. The RMS phase jitter at 168.8294492MHz output frequency is 0.533ps (12kHz-20MHz integration range).

83PN161I - Block Diagram
83PN161I - Pinout
83PN161I - Block Diagram
83PN161I - Pinout
  • Fourth Generation FemtoClock® Next Generation (NG) technology
  • Footprint compatible with 5mm x 7mm differential oscillators
  • 10 Gb Ethernet LAN/WAN FEC clock converter
  • Supports 33/32, 255/237, 255/238, 255/236 rate conversions
  • Optimized for an input clock frequency of 156.25MHz
  • One differential LVPECL output pair
  • CLK, nCLK input pair can accept the following levels: HCSL, LVDS, LVPECL, LVHSTL and SSTL
  • Output frequency range: 161.1328125MHz – 168.8294492MHz
  • VCO range: 2.0GHz – 2.5GHz
  • Cycle-to-cycle jitter: 18ps (typical)
  • RMS phase jitter, 12kHz – 20MHz: 0.533ps (typical)
  • Full 3.3V or 2.5V operating supply
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Documentation

Design & Development

ECAD Models

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Product Options

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Buy / Sample
    Part Number
    83PN161AKILF
    circleObsolete
    memory
    view_in_ar
    		VFQFPN 10 I Yes Tray
    83PN161AKILFT
    circleObsolete
    memory
    view_in_ar
    		VFQFPN 10 I Yes Reel
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