Overview

The IDT91309 is a high performance, low skew, low jitter zero delay buffer. It uses a phase lock loop (PLL) technology to align, in both phase and frequency, the REF input with the CLKOUT signal. It is designed to distribute high speed clocks in communication systems operating at speeds from 10 to 133 MHz.

  • Zero input - output delay
  • Frequency range 10 - 133 MHz (3.3V)
  • 5V tolerant input REF
  • High loop filter bandwidth ideal for Spread Spectrum applications.
  • Less than 125 ps cycle to cycle Jitter
  • Skew controlled outputs
  • Available in 16 pin, 150 mil SSOP, SOIC & 4.40mm TSSOP packages
  • Skew: Group-to-Group: <215 ps
  • Skew within Group: <100 ps
  • Commercial temperature range: 0°C to +70°C

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

Explore ECAD Models
Diagram of ECAD Models

Product Options

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Buy / Sample
    Part Number
    91309AGILF
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    memory
    view_in_ar
    		TSSOP 16 I Yes Tube
    91309AGILFT
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    memory
    view_in_ar
    		TSSOP 16 I Yes Reel
    91309AGLF
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    memory
    view_in_ar
    		TSSOP 16 C Yes Tube
    91309AGLFT
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    memory
    view_in_ar
    		TSSOP 16 C Yes Reel
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