Overview

The 85108I is a low skew, high performance 1-to-8 Differential-to-0.7V HCSL Clock Distribution Chip. The 85108I CLK, nCLK pair can accept most differential input levels and translates them to 3.3V HCSL output levels. The 85108I provides a low power, low noise, low skew, point-to-point solution for distributing HCSL clock signals. Guaranteed output and part-to-part skew specifications make the 85108I ideal for those applications demanding well defined performance and repeatability.

85108I - Block Diagram
85108I - Pinout
85108I - Block Diagram
85108I - Pinout
  • Eight 0.7V differential HCSL clock output pairs
  • CLK/nCLK input pair can accept the following differential input levels: LVPECL, LVDS, LVHSTL, SSTL, HCSL
  • Maximum output frequency: 500MHz
  • Additive phase jitter, RMS: 0.09ps (typical)
  • Output skew: 80ps (maximum)
  • Part-to-part skew: 400ps (maximum)
  • Propagation delay: 3ns (maximum)
  • Full 3.3V operating supply
  • -40°C to 85°C ambient operating temperature
  • Available in lead-free (RoHS 6) package

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

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Diagram of ECAD Models

Product Options

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Buy / Sample
    Part Number
    85108AGILF
    circleObsolete
    memory
    view_in_ar
    		TSSOP 24 I Yes Tube
    85108AGILFT
    circleObsolete
    memory
    view_in_ar
    		TSSOP 24 I Yes Reel
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