Electromagnetic interference (EMI) is a major challenge for designers of electronic devices. Strict guidelines enforced by the FCC and European Union regulate the amount of EMI a system can generate. Frequency references, whether crystal oscillators or silicon-based PLLs, can be a major source of EMI on circuit boards. Spread spectrum clocking is a technique where the clock frequency is modulated slightly to lower the peak energy generated by a clock. Spread spectrum clocking lowers clock-generated EMI from both the fundamental frequency and subsequent harmonics, thereby reducing the total system EMI.
IDT has a proprietary mix of analog and digital phase-locked loop (PLL) technologies that are the basis of an extensive portfolio of flexible spread spectrum clock generator (SSCG) products. IDT's spread spectrum clock generator (SSCG) products support two different types of spread spectrum clocking: down spread and center spread. Down spread spectrum clocking modulates below the nominal clock frequency while center spread spectrum clocking modulates evenly above and below the nominal clock frequency. The type of spread spectrum clocking used depends on the specifications of the clock destination. Some destination chipsets, CPUs, etc., have a maximum clock frequency specification that cannot be violated. In these cases, down spread spectrum clocking should be applied.
IDT's spread spectrum clock generator portfolio has products supporting crystal or clock reference inputs. For systems requiring spread spectrum clock injection on clock reference inputs, IDT's high-performance PLL technology maintains good phase noise and high performance while reducing EMI. By using IDT's spread spectrum clock technology, customers maintain high performance while saving cost and design time on expensive shielding, chokes and ferrite beads.