Overview

The IDT5U49319 is a very low power clock for Freescale P10xx and P20xx MCU’s. It uses a 1.5V core and Low-Power HCSL (LP-HCSL) differential outputs for minimal power consumption. The SATA and SRC outputs are PCIe Gen1/2 compatible.

5U49319 Block Diagram
5U49319 Pinout Diagram
5U49319 Block Diagram
5U49319 Pinout Diagram
  • Various outputs are configurable to run in power down; supports Wake_On_LAN
  • FPGA clock frequency is selectable via SMBus; allows low-power system standby
  • Strapping pin sources SRC outputs from either spreading or non-spreading PLL; maximum system flexibility
  • FLEX clock is pin selectable to be FPGA clock or USB PHY clock; maximum system flexibility
  • TEST pin tri-states all outputs; speeds up board test
  • External 25MHz crystal; supports tight ppm
  • OE# pins; support SRC power management
  • Low power differential clock outputs; reduced power and board space
  • Differential outputs internally terminated to 100ohm differential impedance; reduced board space
  • Space-saving 7x7mm 48-pin VFQFPN with 0.5mm pad pitch; reduced board space without the need for fine pitch assembly techniques

Documentation

Design & Development

ECAD Models

Schematic symbols, PCB footprints, and 3D CAD models from SamacSys can be found by clicking on products in the Product Options table. If a symbol or model isn't available, it can be requested directly from the website.

Explore ECAD Models
Diagram of ECAD Models

Product Options

    Processing table
    Pkg. Type
    Lead Count (#)
    Temp. Grade
    Pb (Lead) Free
    Carrier Type
    Buy / Sample
    Part Number
    5U49319NLG
    circleObsolete
    memory
    view_in_ar
    		VFQFPN 48 C Yes Tray
    5U49319NLG8
    circleObsolete
    memory
    view_in_ar
    		VFQFPN 48 C Yes Reel
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