Overview

Description

The 9FGL839 is an 8 output differential synthesizer for PCI Express Gen1, Gen2, and Gen3 applications. It has integrated terminations providing direction connection to 100 ohm transmission lines and saving 32 resistors compared to standard HCSL outputs. The 9FGL839 supports Common, Data and Separate Reference no-Spread (SRnS) PCIe clock architectures.

Features

  • Integrated terminations; save 32 resistors compared to standard HCSL outputs
  • LP-HCSL outputs; support separate VDDIO rail and 130mW typical power consumption
  • 8 OE# pins; Hardware control of each output
  • 25 MHz crystal input; exact synthesis
  • 100 MHz operation; supports PCIe and SATA applications
  • VDDIO; allows outputs to run from lower voltage rail to save power
  • OE# pins have 1.5V high input threshold; direct interface to 1.8-3.3 V systems
  • <130 mW power consumption (typical)
  • Cycle-to-cycle jitter <50 ps
  • Output-to-output skew <100 ps
  • PCIe Gen2 phase jitter <3.0 ps RMS
  • PCIe Gen3 phase jitter <1.0 ps RMS
  • PCIe Gen3 SRnS clock phase jitter <0.7 ps RMS

Comparison

Applications

Documentation

Design & Development

Models