Overview

Description

The 6V31023 is a 2:1 differential clock mux for PCI Express applications. It has very low additive jitter making it suitable for use in PCIe Gen2 and Gen3 systems. The 6V31023 selects between 1 of 2 differential HCSL inputs to drive a single differential HCSL output pair. The output can also be terminated to LVDS.

Features

  • Low additive jitter suitable for use in PCIe Gen2 and Gen3 systems
  • 16-pin TSSOP package for small board footprint
  • Outputs can be terminated to LVDS to drive a wider variety of devices
  • OE control pin offers greater system power management
  • Industrial temperature range supports demanding embedded applications
  • Additive cycle-to-cycle jitter <5 ps
  • Additive phase jitter (PCIe Gen3) <0.2ps
  • Operating frequency up to 200MHz

Comparison

Applications

Documentation

Design & Development

Models