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IEEE 1588 and Synchronous Ethernet Clocks (SyncE)

The Renesas Digital PLLs (DPLLs) for IEEE 1588 and synchronous Ethernet are designed for synchronization over packet switched networks. For IEEE 1588 applications, the embedded Digitally Controlled Oscillators (DCOs) can be used as low-jitter synthesizers for IEEE 1588 clock recovery algorithms. For synchronous Ethernet applications, the DPLLs comply with ITU-T recommendations for (synchronous Ethernet Equipment Clocks (EECs); these devices also comply with SONET/SDH, PDH and TDM synchronization requirements. The Renesas DPLLs can be switched between IEEE 1588 DCO and SyncE modes; and they provide capabilities such as selectable loop filters, holdover, hitless reference switching, phase slope limiting, and clock redundancy.

Download the Altera and IDT Synchronous Ethernet Solution for ITU-T G.8262 white paper

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Product Selector: IEEE 1588 and Synchronous Ethernet Clocks

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ClockMatrix™2 System Synchronizer Overview
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